Networking and Parallel Systems Lab
The Networking and Parallel Systems (NPS) Lab investigates runtime systems and programming models for parallel computer architectures; architectures, algorithms and security issues for networking applications; algorithm acceleration on parallel computer architectures, and hardware-software co-design. We work with various kinds of parallel hardware: multi-core general purpose processors, many-core GPUs, network processors, FPGAs, and HPC clusters. We enjoy working at the intersection between hardware and software.
The NPS lab is equipped with four HPC servers with high-end Nvidia GPUs (Tesla C2050, C2070, C2075, K20 and K40x) and Intel Phi Coprocessors; eight workstations with 4-core Intel CPUs and low-end Nvidia GPUs (Quadro 2000, GeForce GTX 460 and GTX 480); Nvidia CARMA and Jetson TK1 devices and 1G and 10G NetFPGA boards.
- April 2016: Congratulations to Huyen for successfully defending her MS thesis!
- April 2016: Michela wins the University of Missouri President’s Award for Early Career Excellence [news].
- March 2016: Congratulations to Daniel for being awarded a National Merit Scholarship from the Chinese Ministry of Education!
- March 2016: Congratulations to Daniel for accepting a job at Facebook!
- March 2016: Congratulations to Michael for accepting a job at Google!
- March 2016: IVM: Congratulations to Kittisak and Ruidong for having their paper: "IVM: A Task-based Shared Memory Programming Model and Runtime System to Enable Load Balancing and Uniform Access to Heterogeneous CPU-GPU Clusters" accepted at CF 2016!
- March 2016: Congratulations to Michael for receiving the College of Engineering's Outstanding MS Student award!
- December 2015: Congratulations to Xiaodong for having his paper “O3FA: A Scalable, Finite Automata-based, Pattern-Matching Engine for Out-of-Order Packet Inspection in IDS” accepted at ANCS 2016!
- December 2015: Congratulations to Henry and Daniel for having their paper "Compiler-Assisted Workload Consolidation For Efficient Dynamic Parallelism on GPU” accepted at IPDPS 2016!
- December 2015: Congratulations to Marziyeh for having the paper "High Performance Pattern Matching Using the Automata Processor” coauthored with collaborators at GeorgiaTech accepted at IPDPS 2016!
- December 2015: Congratulations to Henry and Ruidong for successfully defending their M.S. thesis!
- September 2015: Michael's poster is accepted at SC'15 ACM Research Competition Program.
- September 2015: Daniel's work "Facilitating Irregular Applications on Many-core Processors" is accepted at SC'15 Doctoral Showcase Program.
- September 2015: Paper "Fast Support for Unstructured Data Processing: the Unified Automata" co-authored by Kevin Fang, Tung Hoang, Michela Becchi and Andrew Chien is accepted at MICRO 2015.
- July 2015: Kittisak Sajjapongse successfully defends his Ph.D. dissertation and becomes our first Ph.D. graduate!
- June 2015: Our proposal SHF:Medium:Collaborative Research:A comprehensive methodology to pursue reproducible accuracy in ensemble scientific simulations on multi- and many-core platforms in collaboration with Michela Taufer from University of Delaware is funded by the National Science Foundation.
- May 2015: Daniel's and Henry's paper "Nested Parallelism on GPU: Exploring Parallelization Templates for Irregular Loops and Recursive Computations" is accepted at ICPP 2015.
- March 2015: Paper "Semantics Driven Hardware Design, Implementation, and Verification with ReWire" co-authored with Adam Procter, Bill Harrison, Ian Graves and Gerald Allwein is accepted at LCTES2015
- March 2015: Tyler accepts a summer internship position at Micron, Boise, ID.
- March 2015: Michael accepts a summer internship position at NEC Labs, Princeton, NJ.
- January 2015: Michela is awarded the National Science Foundation's Early Career Award for the proposal entitled CAREER: Compiler and Runtime Support for Irregular Applications on Many-core Processors
- January 2015: Daniel's and Henry's short paper entitled "Exploiting Dynamic Parallelism to Efficiently Support Irregular Nested Loops on GPUs " is accepted at the COSMIC 2015 workshop colocated with CGO 2015.
Our lab is supported by: